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[MiddleWarepwm_VerilogHDLV1.1

Description: 本软件在CPLD上实现数字PWM控制,用Verilog HDL语言编写,在MAX PLUS II调试成功,可用-the software on the CPLD digital PWM control, using Verilog HDL language, MAX PLUS II in debugging success can be
Platform: | Size: 232448 | Author: wjz | Hits:

[Windows Developcpu-maxplus

Description: MaxplusII编写的简易cpu,可实现简单加减法等操作-MaxplusII summary prepared by the cpu can realize simple addition and subtraction, etc
Platform: | Size: 513024 | Author: godtroop | Hits:

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